vrijdag 18 januari 2019

Practical rules to minimize spurs when using the SI5351

After more testing some rules:

Target output is: The output required to have minimum spurs
All dB levels in the rules refer to the target output level as 0dB

- Muting an output and stopping the clock will remove all spurs caused by that output/clock
- Any use of fractional PLL will increase the number of spurs on ALL outputs (at < -70dB)
- Any use of fractional PLL on output next to the target output will cause substantial spurs (> - 60dB)
- Avoid any frequency close to but not exactly a multiple of 5MHz
- The spurs in multiples of 5MHz can be above -55dB

In practice:
With an IF2 at 10.7MHz, set IF1 to xx.7Mhz i.s.o. xxMHz so LO2 can be set to xx-10 MHz and make sure xx is a multiple of 5MHz

Example:
IF1 is 40MHz, LO1 is 45MHz, IF2 is 10.7MHz, LO2 is 29.3MHz

The tested SI5351A uses a 25MHz XCO as reference, hence the multiples of 5MHz, will be different if you use a 27MHz XCO
The examples use output 0 for LO1 and output 2 for LO2 and keep output 1 muted low



Changing the IF1 to 40.7MHz
So IF1 is 40.7MHz, LO1 is 45MHz, IF2 is 10.7MHz, LO2 is 30MHz



Of course when changing LO1  to tune differently this will cause spurs in LO1 so there is never a generic good solution for the tuning signal but all other frequencies should be multiples of 5MHz to avoid a accumulation of spurs

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